1. Field of the Invention
The present invention relates to a gate drive circuit for voltage-driven type semiconductor switching devices used in an electric power converter.
2. Background Art
FIG. 4 is a diagram showing the configuration of a main circuit of an inverter using voltage-driven type semiconductor switching devices.
The main circuit of the inverter shown in FIG. 4 includes a DC power supply 1, an inverter section 2 in three-phase including voltage-driven type semiconductor switching devices 2a to 2f (hereinafter referred to as switching devices 2a to 2f), gate drive circuits 3a and 3b and a control circuit 4. From the control circuit 4, control signals Sa and Sb are given to the gate drive circuits 3a and 3b, respectively. The reference sign M designates a motor as a load.
The DC power supply 1 may be substituted by a circuit with a rectifying circuit that rectifies an AC power supply voltage and an electrolytic capacitor. In addition, although FIG. 4 shows the gate drive circuits 3a and 3b and the control signals Sa and Sb only with respect to the semiconductor switching devices 2a and 2b, respectively, the other semiconductor switching devices 2c to 2f are similarly provided with gate drive circuits 3c to 3f to which control signal Sc to Sf are given, respectively.
For the voltage-driven type switching devices 2a to 2f, in addition to MOSFETs as illustrated, IGBTs are sometimes used, in which case each of the IGBT main bodies has a freewheeling diode connected in inverse-parallel thereto.
Since both of the gate drive circuits 3a and 3b have the same configurations, the configuration of the gate drive circuit 3a driving the switching devices 2a will be explained here.
FIG. 5 is a diagram showing the configuration of a gate drive circuit 3a1 as a first related art. In FIG. 5, the gate drive circuit 3a1 includes a driving section 31 formed of a device such as a photocoupler to which the control signal Sa is inputted, a DC power supply 32 (with the voltage value thereof taken as VB) for driving the circuit, a base resistor 33 with one end thereof connected to the driving section 31, transistors 34 and 35 connected in series with their respective bases connected to the other end of the base resistor 33 and their respective emitters connected to the gate of the switching device 2a to form totem-pole output transistors that output a non-inverted signal of the input signal, and current limiting resistors 36 and 37 connected in series to the transistors 34 and 35, respectively.
Here, the transistor 34 for making the switching device 2a turned-on is an n-p-n type and the transistor 35 for making the switching device 2a turned-off is an n-p-n type. The transistors 34 and 35 are operated to be complementarily turned-on and -off by a signal S1 applied to their respective bases which signal is inputted through the base resistor 33 from the driving section 31.
For the power supply of the circuit, a positive and negative power supplies are sometimes provided instead of the DC power supply 32 while being made to correspond to the respective transistors 34 and 35.
The operation of the gate drive circuit 3a1 shown in FIG. 5 will be explained in detail. When the signal S1 is at a “High” level, the transistor 34 is turned-on to make a current flow into the gate of the switching device 2a. When this makes the gate-source voltage VGS of the switching device 2a exceed the gate threshold voltage (hereinafter sometimes also simply referred to as a threshold voltage) Vth of the switching device 2a, the switching device 2a is made to be turned-on. While, when the signal S1 is at a “Low” level, the transistor 35 is turned-on to make a current flow in the direction of discharging electric charges stored in the gate of the switching device 2a. This makes the switching device 2a turned-off.
Here, by adjusting the resistance values of the base resistor 33 and the current limiting resistors 36 and 37, the waveform of the gate-source voltage of the switching device 2a at the switching thereof is controlled so that the rising and falling in the waveform are prevented from becoming excessively abrupt for carrying out the suppression of a surge voltage.
The gate drive circuit as is shown in FIG. 5 is described in JP-A-2004-129378 (paragraph [0005] and FIG. 8 etc.), for example.
In the next, FIG. 6 is a diagram showing the configuration of a gate drive circuit 3a2 as a second related art. The gate drive circuit 3a2 is that in which an active Miller clamp circuit including a transistor 38 is added to the circuit shown in FIG. 5 as will be explained later.
In the circuit shown in FIG. 5, when the switching device 2a is being made to be turned-off with the transistor 35 for turning-off being made to be turned-on, the switching device 2b in the opposite arm shown in FIG. 4 is also in a turned-off state, and a body diode in a state of being connected in inverse parallel to the switching device 2a has a freewheeling current flowing therein in the direction opposite to that of the current to flow in the switching device 2a, the change in the switching device 2b from the turned-off state to a turned-on state causes the power supply voltage to be suddenly applied to the turned-off switching device 2a. This also causes the power supply voltage to be suddenly applied to the body diode of the switching device 2a as a reverse voltage. Thus, at the reverse recovery of the body diode of the switching device 2a, when the gate-drain voltage v of the switching device 2a changes with respect to time t with a large voltage variation rate dv/dt, a current i flows into the gate of the switching device 2a through a leakage capacitor (capacitance C) between the gate and drain of the switching device 2a as is shown in broken lines with a comparatively large value (i=C·dv/dt). This causes the gate-source voltage VGS of the switching device 2a to be going to rise. When the gate-source voltage VGS of the switching device 2a exceeds the threshold voltage Vth thereof, the switching device 2a is made to be turned-on to result in a short circuit between the upper and lower arms to possibly cause the switching devices 2a and 2a′ to be broken down in the worst case.
For preventing this, as is shown in FIG. 6, a transistor 38 is connected between the gate and source of the semiconductor switching device 2a so as to force the transistor 38 to turn-on when the semiconductor switching device 2a is made to be turned-off. This lowers the impedance between the gate and source of the semiconductor switching device 2a to prevent the turning-on thereof. In this case, the gate of the switching device 2a is connected to a driving section 31a with a signal line 39 and the base of the transistor 38 is also connected to the driving section 31a, by which an active Miller clamp circuit is formed. The active Miller clamp circuit is a circuit which actively detects and makes a judgement at the driving section 31a on the rising of the gate-source voltage VGS of the switching device 2a due to the influence of the leakage capacitor (Miller capacitor) between the gate and drain of the switching device 2a and then clamps the rising.
The control operation for turning-on the transistor 38 is that in which the driving section 31a detects the gate-source voltage VGS of the semiconductor switching device 2a through a signal line 39 and then outputs a forced-on signal S2 to provide it to the base of the transistor 38 before the gate-source voltage VGS reaches the threshold voltage Vth.
The gate drive circuit provided with such an active Miller clamp circuit as is shown in FIG. 6 is described in JP-A-2006-296119 (paragraph [0008] and FIG. 2 etc.), for example.
[Patent Document 1] JP-A-2004-129378 (paragraph [0005] and FIG. 8 etc.)
[Patent Document 2] JP-A-2006-296119 (paragraph [0008] and FIG. 2 etc.)
Incidentally, in general, for enlarging the capacity of a system, a plurality of switching devices in each arm of a system such as an inverter are sometimes used while being connected in parallel.
FIG. 7 is a diagram showing the circuit configuration in the case when two switching devices 2a and 2a′ being connected in parallel to each other are driven by the gate drive circuit 3a1 with the circuit configuration thereof being the same as that of the gate drive circuit 3a1 shown in FIG. 5. In FIG. 7, reference signs i1 and i2 designate the drain currents of the semiconductor switching devices 2a and 2a′, respectively.
Variation in characteristic in the threshold voltage Vth of each of the semiconductor switching devices 2a and 2a′ shown in FIG. 7 causes a time lag between the switching timings of the semiconductor switching devices 2a and 2a′. FIG. 8 is a waveform diagram showing the gate-source voltage VGS of one of the switching devices 2a and 2a′ shown in FIG. 7. That is, as is shown in FIG. 8, for an increasing gate-source voltage VGS, a device with a low threshold voltage Vth turns on at a time t1, while a device with a high threshold voltage Vth is to turn on at a time t2 to cause a time lag Δt between the times t1 and t2. This causes a large current to flow during the time lag Δt in the device turned on earlier, which results in concentrated production of a switching loss in the device.
FIGS. 9 and 10 are waveform diagrams each showing the waveforms of the drain currents i1 and i2 of their respective switching devices 2a and 2a′. FIG. 9 shows the case in which the difference between the threshold voltage Vth1 of the switching device 2a and the threshold voltage Vth2 of the switching device 2a′ (in other words, the difference between the turning-on time t1 and the turning-on time t2) is small. FIG. 10 shows the case in which the difference between the threshold voltage Vth1 and the threshold voltage Vth2 is large. As is apparent from FIGS. 9 and 10, a larger time lag Δt causes an imbalance between the drain currents i1 and i2.
In addition, FIG. 11 is a waveform diagram showing the waveforms of currents i1d and i2d of two diodes each being at the reverse recovery thereof which diodes are respectively connected to two switching devices (when the switching devices are MOSFETs, the diodes are body diodes) connected in parallel to each other in the arm on the opposite side of the arm provided with the two semiconductor switching devices 2a and 2a′ having a large difference between their respective gate threshold voltages Vth1 and Vth2 and being connected in parallel to each other.
A large difference between the threshold voltages Vth1 and Vth2 of their respective switching devices 2a and 2a′, even though the diodes have characteristics equal to each other in the arm on the opposite side, causes a considerable imbalance in drain current between the switching devices 2a and 2a′ also by the additional difference between wiring-structural factors of the paths from each switching device to each diode and wiring-structural factors around the diodes. As a result, also in the diodes on the opposite arm side, an imbalance is created between their respective currents i1d and i2d as is shown in FIG. 11 when the diodes are brought from freewheeling states to reverse recovery states in the transient state in which the switching devices 2a and 2a′ are brought from a turned-off states to turned-on states.
Therefore, with respect to the gate drive circuit, the loss design and the thermal design thereof must be carried out with variations in the gate threshold voltages of the switching devices taken into consideration. This inevitably causes the design work of the gate drive circuit to be redundant compared with the case in which no variations are found in switching devices to be used, that is, the case in which the characteristics in all switching devices are identical. The redundancy in design can be lessened by individual control of the characteristics of all of switching devices. This, however, causes an increase in the expense required for the individual control of the characteristics, which inevitably results in a rise in cost by the amount of the increase.
Incidentally, by providing the active Miller clamp circuit explained in the foregoing also in the gate drive circuit in the circuit shown in FIG. 7, the switching devices 2a and 2a′ can be prevented from unnecessary turning-on. This, however, increases the scale of the gate drive circuit and, along with this, necessitates an exclusive IC provided with the control circuit of the active Miller clamp circuit and other control functions, which also caused the rise in cost.
Furthermore, even though the active Miller clamp circuit is provided, the disadvantage due to the imbalance in current caused by the difference between the threshold voltages Vth1 and Vth2 remains unsolved.
Accordingly, it is an object of the invention to provide a gate drive circuit which, when driving a plurality of semiconductor switching devices connected in parallel to each other in each of the upper and lower arms in the gate drive circuit, inhibits the imbalance in current between the semiconductor switching devices due to the difference between gate threshold voltages of the switching devices and, along with this, without increasing the scale of the circuit, makes it possible to prevent a short circuit in the upper and lower arms when the semiconductor switching devices in the opposite arm are made to be turned-on.